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AS1702 - as1705 1.8w single-channel audio power amplifiers data sheet www.austriamicrosystems.com revision 1.47 1 - 20 1 general description the AS1702 - as1705 are single-channel differential audio power-amplifiers designed to drive 4 and 8 loads. the integrated gain circuitry of these amplifiers and their small size make them ideal for 2.7- to 5v-pow- ered portable audio devices. the differential input design improves noise rejection and provides common-mode rejection. a bridge-tied load (btl) design minimizes external component count, while providing high-fidelity audio power amplification. the devices deliver 1.8w continuous average power per channel to a 4 load with less than 1% total harmonic distortion (plus noise), while operating from a single 2.7 to 5v supply. for reduced component designs, the devices are avail- able with different gain levels as shown in ta b l e 1 . integrated shutdown circuitry disables the bias genera- tor and amplifiers, and reduces quiescent current con- sumption to less than 100na. the shutdown input can be set active-high or active-low. all devices contain click- and-pop suppression circuitry that reduces audible clicks and pops during power-up and shutdown. the AS1702 - as1705 are pin compatible with the lm4895 and the max9718a/b/ c/d. the devices are available in a 10-pin msop package and a 10-pin dfn package. figure 1. simplified block diagram 2 key features 2.7 to 5.5v (v cc ) single-supply operation thd+n: 1.8w into 4 at 1% (per channel) differential input adjustable gain option (AS1702) internal fixed gain to reduce external component count (as1703, as1704, as1705) <100na low-power shutdown mode click and pop suppression pin-compatible to national semiconductor lm4895 (as1705) and maxim max9718a/b/c/d operating temperature range: -40 to +85oc package types - 10-pin msop - 10-pin dfn 3 applications the devices are ideal as audio front-ends for battery powered audio devices such as mp3 and cd players, mobile phones, pdas, portable dvd players, and any other hand-held battery-powered device. table 1. standard products model gain AS1702 adjustable (via external components) as1703 a v = 0db as1704 a v = 3db as1705 a v = 6db AS1702/as1703/ as1704/as1705 single supply 2.7 to 5.5v r l = 4 or 8 + ? 4 in+ 10 out+ 2 in- 1 shdn 3 shdm 6 out- 9 v cc 7 gnd
www.austriamicrosystems.co m revision 1.47 2 - 20 AS1702 - as1705 data sheet - pinout 4 pinout pin assignments figure 2. pin assignments (top view) pin descriptions table 2. pin descriptions ? msop-10 and tdfn-10 package pin name description 1shdn shutdown input . the polarity of this pin is dep endent on the state of pin shdm. 2in- inverting input 3 shdm shutdown-mode polarity input . this pin controls the polarity of pin shdn. connect this pin high for an active-high shdn input. connect this pin low for an active-low shdn input (see table 6 on page 11) . 4in+ non-inverting input 5bias dc bias bypass 6out- bridge amplifier negative output 7gnd ground 8n/c not connected . no internal connection. 9v cc power supply 10 out+ bridge amplifier positive output 1 2 3 4 10 9 8 7 shdn in- shdm in+ out+ v cc n/c gnd AS1702/ as1703/ as1704/ as1705 5 bias 6 out- 1 2 3 4 10 9 8 7 shdn in- shdm in+ out+ v cc n/c gnd AS1702v/ as1703v/ as1704v/ as1705v 5 bias 6 out- 10-pin msop package 10-pin dfn package
www.austriamicrosystems.co m revision 1.47 3 - 20 AS1702 - as1705 data sheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 3 may cause permanent damage to the device. these are stress ratings only, and functional operation of the de vice at these or any other cond itions beyond those indicated in electrical character- istics on page 4 is not implied. exposure to absolute maximum ra ting conditions for extended periods may affect device reliability. ? using pcb metal plane and thermally-conductive paste. table 3. absolute maximum ratings parameter min max unit comments supply voltage (v cc to gnd) -0.3 +7 v any other pin to gnd -0.3 v cc + 0.3 v input current (latchup immunity) -50 50 ma jedec 17 continuous power dissipation (t amb = +70oc) ? 600 mw msop-10 continuous power dissipation (t amb = +25oc) ? 1,000 mw msop-10 electro-static discharge (esd) 1 kv human body model and mil-std883e 3015. 7 methods operating temperature range (t amb ) -40 +85 oc storage temperature range -65 +150 oc package body temperature +260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std-020c ?moisture/reflow sens itivity classification for non-hermetic solid state surface mount devices?
www.austriamicrosystems.co m revision 1.47 4 - 20 AS1702 - as1705 data sheet - electrical characteristics 6 electrical characteristics 5v operation table 4. electrical characteristics ? 5v supply, t amb = +25oc (unless ot herwise specified) symbol parameter conditions min typ max unit v cc supply voltage t amb = -40 to +85oc 2.7 5.5 v i cc supply current 1 1. quiescent power supply current is specified and tested with no load. quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier. v in- = v in+ = v bias ;t amb = -40 to +85oc 8 10.4 ma i shdn shutdown supply shdn = shdm = gnd 0.05 1 a v ih shdn , shdm threshold 0.7 x v cc v v il 0.3 x v cc v bias common-mode bias voltage 2 2. common-mode bias voltage is the voltage on bias and is nominally v cc /2. v cc /2 - 5% v cc /2 v cc /2 + 5% v v os output offset voltage v in- = v in+ = v bias a v = 0db (as1703) 1 10 mv a v = 3db (as1704) 1 15 a v = 6db (as1705) 1 20 v ic common-mode input voltage 3 3. guaranteed by design. inferred from cmrr te s t a v = 0db (as1703) 0.2 v cc - 0.2 v a v = 3db (as1704) 0.9 v cc - 0.9 a v = 6db (as1705) 1.5 v cc - 1.5 external gain AS1702 1.5 v cc - 1.5 r in input impedance as1703, as1704, as1705 10 15 20 k cmrr common-mode rejection ratio f n = 1khz -64 db psrr power supply rejection ratio v in- = v in+ = v bias ; v rippl e = 200mvp-p; r l = 8 ; c bias = 1f f = 217hz -79 db f = 1khz -73 p out output power 4 4. guaranteed by design. thd+n = 1%; f in = 1khz r l = 8 0.8 1.25 w r l = 4 1.8 thd+n total harmonic distortion plus noise 5 5. measurement bandwidth for thd+n is 22hz to 22khz. r l = 4 , f in = 1khz, p out = 1.28w, v cc = 5v, a v = 6db 0.06 % r l = 8 , f in = 1khz, p out = 0.9w, v cc = 5v, a v = 6db 0.03 gain accuracy as1703, as1704, as1705 1 2 % thermal shutdown threshold +145 oc thermal shutdown hysteresis 9oc t pu power-up/enable from shutdown time 125 ms t shdn shutdown time 3.5 s v pop turn-off transient 6 6. peak voltage measured at power-on, power-off, into or out of shdn. bandwidth defi ned by a-weighted filters, inputs at ac gnd. v cc rise and fall times 1ms. 50 mv
www.austriamicrosystems.co m revision 1.47 5 - 20 AS1702 - as1705 data sheet - electrical characteristics 3v operation table 5. electrical characteristics ? 3v supply, t amb = +25oc (unless ot herwise specified) symbol parameter conditions min typ max unit i cc supply current 1 1. quiescent power supply current is specified and tested with no load. quiescent power supply current depends on the offset voltage when a practical load is co nnected to the amplifier. guaranteed by design. v in- = v in+ = v bias ; t amb = -40 to +85oc, per amplifier 7.5 ma i shdn shutdown supply shdn = shdm = gnd per amplifier 0.05 1 a v ih shdn , shdm threshold 0.7 x v cc v v il 0.3 x v cc v bias common-mode bias voltage 2 2. common-mode bias voltage is the voltage on bias and is nominally v cc /2. v cc /2 - 5% v cc /2 v cc /2 + 5% v v os output offset voltage v in- = v in+ = v bias a v = 0db (as1703) 1 10 mv a v = 3db (as1704) 1 15 a v = 6db (as1705) 1 20 v ic common-mode input voltage 3 3. guaranteed by design. inferred from cmrr te s t a v = 0db (as1703) 0.2 v cc - 0.2 mv a v = 3db (as1704) 0.6 v cc - 0.6 a v = 6db (as1705) 1.0 v cc - 1.0 external gain AS1702 1.0 v cc - 1.0 r in input impedance as1703, as1704, as1705 10 15 20 k cmrr common-mode rejection ratio f n = 1khz -64 db psrr power supply rejection ratio v in- = v in+ = v bias ; v ripple = 200mvp-p; r l = 8 ; c bias = 1f f = 217hz -79 db f = 1khz -73 p out output power 4 4. guaranteed by design. r l = 4 , thd+n = 1%; f in = 1khz 640 mw r l = 8 , thd+n = 1%; f in = 1khz 440 thd+n total harmonic distortion plus noise 5 5. measurement bandwidth for thd+n is 22hz to 22khz. r l = 4 , f in = 1khz, p out = 460mw, a v = 6db 0.06 % r l = 8 , f in = 1khz, p out = 330mw, a v = 6db 0.04 gain accuracy as1703, as1704, as1705 1 2 % thermal shutdown threshold +145 oc thermal shutdown hysteresis 9oc t pu power-up/enable from shutdown time 125 ms t shdn shutdown time 3.5 s v pop turn-off transient 6 6. peak voltage measured at power-on, power-off, into or out of shdn. bandwidth defi ned by a-weighted filters, inputs at ac gnd. v cc rise and fall times 1ms. 50 mv
www.austriamicrosystems.co m revision 1.47 6 - 20 AS1702 - as1705 data sheet - typical operating characteristics 7 typical operating characteristics figure 3. thd + noise vs. frequency; figure 4. thd + noise vs. frequency; v dd = 3v, r l = 4 , av = 2 v dd = 3v, r l = 8 , av = 2 figure 5. thd + noise vs. frequency; figure 6. thd + noise vs. frequency; v dd =5v, r l = 4 , av = 2 v dd = 5v, r l = 8 , av = 2 figure 7. thd + noise vs. frequency; figure 8. thd + noise vs. output power; v dd = 5v, r l = 4 , av = 4 v dd = 5v, r l = 8 , av = 4 0.001 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd + n (%) e 0.001 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd + n (%) e p out = 50mw p out = 250mw p out = 100mw p out = 250mw 0.001 0.01 0.1 1 10 10 100 1000 10000 frequency [hz] thd + n [%] 0.001 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd + n (%) e p out = 1w p out = 250mw p out = 250mw p out = 750mw 0.001 0.01 0.1 1 10 10 100 1000 10000 frequenzy (hz) thd + n (%) e 0.001 0.01 0.1 1 10 10 100 1000 10000 frequency (hz) thd + n (%) e p out = 200mw p out = 1w p out = 200mw p out = 800mw
www.austriamicrosystems.co m revision 1.47 7 - 20 AS1702 - as1705 data sheet - typical operating characteristics figure 9. thd + noise vs. output power; figure 10. thd + noise vs. output power; v dd = 3v, r l = 4 , av = 2 v dd = 3v, r l = 8 , av = 2 figure 11. thd + noise vs. output power; figure 12. thd + noise vs. output power; v dd = 3v, r l = 4 , av = 4 v dd = 3v, r l = 8 , av = 4 figure 13. thd + noise vs. output power; figure 14. thd + noise vs. output power; v dd = 5v, r l = 4 , av = 2 v dd = 5v, r l = 8 , av = 2 0.01 0.1 1 10 0 0.1 0.2 0.3 0.4 0.5 0.6 output power (w) thd+n (%) . 0.01 0.1 1 10 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 output power (w) thd+n (%) . f in = 1khz f in = 100hz f in = 1khz f in = 100hz 0.01 0.1 1 10 0 0.1 0.2 0.3 0.4 0.5 0.6 output power (w) thd+n (%) . 0.01 0.1 1 10 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 output power (w) thd+n (%) . fin = 1khz f in = 100hz f in = 100hz f in = 1khz 0.01 0.1 1 10 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 output power (w) thd+n (%) . 0.01 0.1 1 10 0 0.4 0.8 1.2 1.6 2 output power (w) thd+n (%) . f in = 1khz f in = 100hz f in = 1khz f in = 100hz
www.austriamicrosystems.co m revision 1.47 8 - 20 AS1702 - as1705 data sheet - typical operating characteristics figure 15. thd + noise vs. output power; figure 16. thd + noise vs. output power; v dd = 5v, r l = 4 , av = 4 v dd = 5v, r l = 8 , av = 4 figure 17. output power vs. load resistance; figure 18. output power vs. load resistance; v dd = 3v v dd = 5v figure 19. output power vs. supply voltage; figure 20. output power vs. supply voltage; r l = 4 r l = 8 0.01 0.1 1 10 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 output power (w) thd+n (%) . 0.01 0.1 1 10 0 0.4 0.8 1.2 1.6 2 output power (w) thd+n (%) . f in = 1khz f in = 100hz f in = 1khz f in = 100hz 0 100 200 300 400 500 600 700 800 900 110100 load resistance ( ) output power (w) e 0 0.4 0.8 1.2 1.6 2 2.4 1 10 100 load resistance ( ) output power (w) e p out @ thd = 10% p out @ thd = 1% p out @ thd = 10% p out @ thd = 1% 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.5 3.5 4.5 5.5 supply voltage (v) output power (w) e 0 0.5 1 1.5 2 2.5 3 2.5 3.5 4.5 5.5 supply voltage (v) output power (w) e p out @ 10% (w) p out @ 1% (w) p out @ 10% (w) p out @ 1% (w)
www.austriamicrosystems.co m revision 1.47 9 - 20 AS1702 - as1705 data sheet - typical operating characteristics figure 21. power dissipation vs. output power; figure 22. power dissipation vs. output power; v dd = 3v, r l = 4 , av = 2. f = 1khz v dd = 3v, r l = 8 , av = 2, f = 1khz figure 23. power dissipation vs. output power; figure 24. power dissipation vs. output power; v dd = 5v, r l = 4 , av = 2. f = 1khz v dd = 5v, r l = 8 , av = 2. f = 1khz figure 25. shutdown hysteresis voltage; v dd = 3v figure 26. shutdown hysteresis voltage; v dd = 5v 0 100 200 300 400 500 600 700 0 100 200 300 400 500 600 700 output power (mw) power dissipation (mw) e 0 50 100 150 200 250 300 350 0 100 200 300 400 500 output power (mw) power dissipation (mw) e 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0.0 0.3 0.6 0.9 1.2 1.5 1.8 output power (w) power dissipation (w) e 0.0 0.2 0.4 0.6 0.8 1.0 0.00.20.40.60.81.01.21.4 output power (w) power dissipation (w) e 0 0.5 1 1.5 2 2.5 3 0123 shutdown voltage (v) common mode bias voltage (v) e 0 0.5 1 1.5 2 2.5 3 0123 shutdown voltage (v) common mode bias voltage (v) e
www.austriamicrosystems.co m revision 1.47 10 - 20 AS1702 - as1705 data sheet - typical operating characteristics figure 27. shutdown current vs. temperature f igure 28. shutdown cu rrent vs. temperature figure 29. power supply rejection ratio vs. frequency -0.03 -0.02 -0.01 0.00 0.01 0.02 0.03 -40-200 20406080 temperature (c) shutdown current (ua) e 0 2 4 6 8 10 -40-20 0 20406080 temperature (c) supply current (ma) e v dd = 5v v dd = 3v v dd = 5v v dd = 3v -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 100 1000 10000 100000 frequency (hz) psrr (db) e v dd = 5v v dd = 3v
www.austriamicrosystems.co m revision 1.47 11 - 20 AS1702 - as1705 data sheet - detailed description 8 detailed description the AS1702 - as1705 are 1.8w high output-current audio amplif iers (configured as btl amplifiers), and contain inte- grated low-power shutdown and click- and pop-suppression circuitry. two inputs (shdm and shdn) allow shutdown mode to be configured as active-high or active-low (see shutdown mode on page 11) . each device has either adjustable or fixed gains (0db, 3db, 6db) (see ordering information on page 19) . bias the devices operate from a single 2.7 to 5.5v supply a nd contain an internally generated, common-mode bias voltage of: referenced to ground. bias provides click-and-pop suppression and sets the dc bias level for the audio outputs. select the value of the bias bypass capacitor as described in section bias capacitor on page 15 . note: do not connect external loads to bias as this can adversely affect overall device performance. shutdown mode all devices implement a 100na, low-power shutdown circuit which reduces quiescent current consumption. as shut- down mode commences, the bias circuitry is automatically di sabled, the device outputs go high impedance, and bias is driven to gnd. the shdm input controls the polarity of shdn: drive shdm high for an active-low shdn input. drive shdm low for an active-high shdn input. click-and-pop suppression during power-up, the device common-mode bias voltage (v bias (see page 4) ) ramps to the dc bias point. when enter- ing shutdown, the device outputs are driven high impedance to 100k between both outputs minimizing the energy present in the audio band, th us preventing clicks and pops. table 6. shutdown mode selection configurations shdm shdn mode 0 0 shutdown mode enabled 0 1 normal operation enabled 1 0 normal operation enabled 1 1 shutdown mode enabled 2 (eq 1) v cc
www.austriamicrosystems.co m revision 1.47 12 - 20 AS1702 - as1705 data sheet - application information 9 application information figure 30. AS1702 typical application diagram figure 31. as1703, as1704, as17 05 typical application diagram av = 2 bias generator AS1702 shutdown control + ? r in 10k 2.7 to 5.5v supply inverting differential input non-inverting differential input 10f c in * 10f * optional c bias 0.1f r in 10k r f 20k c in * 10f 10 out+ 2 in- 1 shdn 3 shdm 6 out- 9 v cc 7 gnd 4 in+ 5 bias r f 20k as1703/ as1704/ as1705 + ? r 2 r 2 r 1 r 1 a v = 1 a v = 1.41 a v = 2 c in * 10f c in * 10f inverting differential input bias generator shutdown control 2.7 to 5.5v supply non-inverting differential input 10f * optional c bias 0.1f 10 out+ 2 in- 1 shdn 3 shdm 6 out- 9 v cc 7 gnd 4 in+ 5 bias
www.austriamicrosystems.co m revision 1.47 13 - 20 AS1702 - as1705 data sheet - application information btl amplifier all devices are designed to drive loads differenti ally in a bridge-tied load (btl) configuration. figure 32. bridge tied load configuration the btl configuration doubles the output voltage (illustrated in figure 32 ) compared to a single-ended amplifier under similar conditions. thus, the differential gain of the device (a vd ) is twice the closed-loop gain of the input amplifier. the effective gain is given by: substituting 2 x v out(p-p) for v out(p-p) into (eq 3) and (eq 4) yields four times the output power due to doubling of the output voltage: since the btl outputs are biased at mid-supply, there is no net dc voltage across the load. this eliminates the need for the large, expensive, performance degrading dc-blocki ng capacitors required by single-ended amplifiers. power dissipation and heat sinking normally, the devices dissipate a significant amount of power. the maximum power dissipation is given in ta b l e 3 as continuous power dissipation, or it can be calculated by: where t j(max) is +150oc, t amb (see ta b l e 3 ) is the ambient temperature, and ja is the reciprocal of the derating fac- tor in oc/w as specified in table 3 . for example, ja of the tqfn package is +59.2oc/w. the increased power delivered by a btl configuration results in an increase in internal power dissipation versus a sin- gle-ended configuration. the maximum internal power dissipation for a given v cc and load is given by: +1 -1 v out(p-p) v out(p-p) 2 x v out(p-p) a vd = 2 x r in (eq 2) r f v rms = 2 2 (eq 3) v out(p-p) p out = r l (eq 4) v rms 2 p disspkf(max) = ja (eq 5) t j(max) -t a p disspkf(max) = 2 r l (eq 6) 2v cc 2
www.austriamicrosystems.co m revision 1.47 14 - 20 AS1702 - as1705 data sheet - application information if the internal power dissipation exceeds the maximum allowed for a given package, power dissipation should be reduced by increasing the ground plane heat-sinking capabilities and increasing the size of the device traces (see lay- out and grounding considerations on page 15) . additionally, reducing v cc , increasing load impedance, and decreas- ing ambient temperature can reduce device power dissipation. the integrated thermal-overload protection circuitry limits th e total device power dissipation. note that if the junction temperature is +145oc, the integrated thermal-over load protection circuitry will disa ble the amplifier output stage. if the junction temperature is reduced by 9, the amplifiers will be re-enabled. note: a pulsing output under continuous thermal overload results as the device heats and cools. fixed differential gain (as1703 , as1704, and as1705) the as1703, as1704, and as1705 contain different internally-fixed gains (see ordering information on page 19) . a fixed gain facilitates simplified designs , decreased footprint size, and eliminatio n of external gain-setting resistors. the fixed gain values are achieved using resistors r 1 and r 2 (see figure 31 on page 12) . adjustable differential gain (AS1702) gain-setting resistors the AS1702 uses external feedback resistors, r f and r in ( figure 33 ), to set the gain of the device as: where a v is the desired voltage gain. for example, r in = 10k , r f = 20k yields a gain of 2v/v, or 6db. note: r f can be either fixed or variable, allowing the gain to be controlled by software (using a as150x digital poten- tiometer. for more information on the as1500 family of digital potentiometers, refer to the latest version of the as150x data sheet , available from the austriamicrosystems website http://www.austriamicrosystems.com .) figure 33. setting the AS1702 gain a v = r in (eq 7) r f AS1702 + ? r f 20k r f 20k bias generator inverting differential input non-inverting differential input c in * 10f c in * 10f r in 10k r in 10k * optional c bias 0.1f 10 out+ 2 in- 6 out- 4 in+ 5 bias
www.austriamicrosystems.co m revision 1.47 15 - 20 AS1702 - as1705 data sheet - application information input filter the btl inputs can be biased at voltages other than mid-supply. however, the integrated common-mode feedback cir- cuit adjusts for input bias, ensuring the outputs are still biased at mid-supply. input capacitors are not required if the common-mode input voltage (v ic ) is within the range specified in ta b l e 4 and ta b l e 5 . input capacitor c in (if used), in conjunction with r in , forms a high-pass filter that removes the dc bias from an incom- ing signal. the ac coupling capacitor allows the amplifier to bias the signal to an optimum dc level. assuming zero- source impedance, the -3db point of the high-pass filter is given by: setting f -3db too high affects the low-frequency response of the amplifier. capacitors with dielectrics that have low-volt- age coefficients such as tantalum or aluminum electrolytic should be used, since capacitors with high-voltage coeffi- cients, such as ceramics, can increase distortion at low frequencies. bias capacitor bias is the output of the internally generated v cc /2 bias voltage. the bias bypass capacitor, c bias , improves psrr and thd+n by reducing power supply noise and other noise sources at the common-mode bias node, and also gener- ates the click- and pop-less dc bias waveform for the amplif iers. bypass bias with a 0.1f capacitor to gnd. larger values of c bias (up to 1f) improve psrr, but increase t on /t off times. for example, a 1f c bias capacitor increases t on /t off by 10 and improves psrr by 20db (at 1khz). note: do not connect external loads to bias. supply bypassing proper power supply bypassing ? connect a 10f ceramic capacitor (c bias ) from v cc to gnd ? will ensure low-noise, low-distortion performance of the device. addi tional bulk capacitance can be added as required. note: place c bias as close to the device as possible. layout and groundi ng considerations well designed pc board layout is essential for optimizing device performance. use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance and route heat away from the device. good grounding improves audio performance and prevents di gital switching noise from coupling onto the audio signal. f -3db = (eq 8) 1 2 r in c in
www.austriamicrosystems.co m revision 1.47 16 - 20 AS1702 - as1705 data sheet - package drawings and markings 10 package drawings and markings figure 34. 10-pin msop package symbol typ tol symbol typ tol a 1.10 max b 0.23 +0.07/-0.08 a1 0.10 0.05 b1 0.20 0.05 a2 0.86 0.08 c 0.18 0.05 d 3.00 0.10 c1 0.15 +0.03/-0.02 d2 2.95 0.10 1 3.0o 3.0o e 4.90 0.15 2 12.0o 3.0o e1 3.00 0.10 3 12.0o 3.0o e2 2.95 0.10 l 0.55 0.15 e3 0.51 0.13 l1 0.95bsc - e4 0.51 0.13 aaa 0.10 - r 0.15 +0.15/-0.08 bbb 0.08 - r1 0.15 +0.15/-0.08 ccc 0.25 - t1 0.31 0.08 e 0.50 bsc - t2 0.41 0.08 s 0.50 bsc -
www.austriamicrosystems.co m revision 1.47 17 - 20 AS1702 - as1705 data sheet - package drawings and markings notes: 1. all dimensions are in millimeters (ang le in degrees), unless otherwise specified. 2. datums b and c to be determined at datum plane h. 3. dimensions d and e1 are to be determined at datum plane h. 4. dimensions d2 and e2 are for top package and d and e1 are for bottom package. 5. cross section a-a to be determined at 0.12 to 0.25mm from the lead tip. 6. dimensions d and d2 do not include mold flash, protrusion, or gate burrs. 7. dimension e1 and e2 do not include interlead flash or protrusion.
www.austriamicrosystems.co m revision 1.47 18 - 20 AS1702 - as1705 data sheet - package drawings and markings figure 35. 10-pin dfn package (3.0x3.0mm) seating -a- -b- e/2 2x 2x top view aaa c aaa c e (d/2 xe/2) 4 index area d/2 d plane nx 10 0.08 c ccc c a a1 side view a3 -c- see detail b 4 index area (d/2 xe/2) 5 6 bottom view n-1 n bbb c a b ddd c e2 e2/2 d2 d2/2 nxb nxl (nd-1) x e e 10 7 8 nxk pin 1 marker e d type a l1 detail b terminal tip odd terminal side e datum a or b 5 l2 symbol min typ max notes a 0.80 0.90 1.00 1, 2 a1 0.00 0.02 0.05 1, 2 a3 0.20 ref 1, 2 l1 0.15 1, 2 l2 0.13 1, 2 0o 14o 1, 2 k 0.20 1, 2 k2 0.17 1, 2 b 0.18 0.25 0.30 1, 2, 5 e0.5 aaa0.151, 2 bbb0.101, 2 ccc 0.10 1, 2 ddd0.051, 2 eee0.081, 2 ggg0.101, 2 variations symbol min typ max notes d bsc 3.00 1, 2 e bsc 3.00 1, 2 d2 2.20 2.70 1, 2 e2 1.40 1.75 1, 2 l 0.30 0.40 0.50 1, 2 n101, 2 nd 5 1, 2, 5
www.austriamicrosystems.co m revision 1.47 19 - 20 AS1702 - as1705 data sheet - ordering information 11 ordering information the devices are available as the standard products shown in table 7 . table 7. ordering information model description gain package type delivery form AS1702-t 1.8w single-channel audio power amplifier adjustable 10-pin msop, 3x3x0.8mm tape and reel as1703-t a v = 0db as1704-t a v = 3db as1705-t a v = 6db AS1702v-t adjustable 10-pin dfn, 3x3x0.8mm tape and reel as1703v-t a v = 0db as1704v-t a v = 3db as1705v-t a v = 6db
www.austriamicrosystems.co m revision 1.47 20 - 20 AS1702 - as1705 data sheet copyrights copyright ? 1997-200 7, austriamicrosystems ag, schloss premstaett en, 8141 unterpremstae tten, austria-europe. trademarks registered ?. all rights reserved. the materi al herein may not be reproduced, adapted, merged, trans- lated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by t he warranty and patent indemni fication provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriami- crosystems ag reserves the right to chang e specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems ag for current information. this product is intended for use in normal commercial a pplications. applications r equiring extended temperature range, unusual environmental requirements, or high reliability app lications, such as military, medical life-support or life- sustaining equipment are specifically not recommended withou t additional processing by austriamicrosystems ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or ar ising out of the furnishing, performance or use of the tech- nical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag a-8141 schloss premstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact

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